Accomplishments

Design of Timing Signal Generator (TSG) for low and medium PRF RADAR using FPGA


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Category
Conference
Conference Name
Second International Conference Advances in Computer Vision and Information Technology
Conference From
16-Dec-2009
Conference To
17-Dec-2009
Conference Venue
Dr. Babasaheb Ambedkar Marathwada University Aurangabad, Maharashtra 431004, India, December 2009.
  • Abstract

The TSG is a key module in any embedded or an intelligent system. The paper discusses the TSG of the RADAR. The designs for TSGcomprises generation of a timing and control signals required for the operation of all the subunits of RADAR like power supply, digital signal processing, receiver unit, etc. It activates various modes of operation of RADAR like calibration mode, operation modes, hold mode, etc. It also generates frequency reference inputs and high voltage on/off controls . The sailent features of the design includes the software oriented hardware design and use of logic synthesis. The hardware consists of the serial communication module, the processor, clock generators and counters. The Spartan-3 Xilinx board is used for the application and testing plan for design is indicated.

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